PDK CAD Tech


Location: Migdal Haemek, ISR, 2310502

Company: Tower Semiconductor Ltd.

About Tower Semiconductor

Looking for a career path in the high tech industry? Become part of a team focused on delivering the most exciting semiconductor technology to the world!  If you enjoy working with others in a fast pace environment and are looking for an opportunity to grow your career in the high tech industry then Tower Semiconductor is the place to be!
Tower Semiconductor is a global specialty foundry leader! We specialize in manufacturing analog integrated circuits for more than 300 customers worldwide in growing markets such as automotive, medical, industrial, consumer and aerospace and defense, among others.

Job Description

You will be responsible for developing and maintaining the physical verification infrastructure required for VLSI design. The primary focus of the role is to develop, implement, and support DRC/LVS rule decks that enable accurate and reliable chip verification according to process and device definitions.
In this role, you will translate device and process requirements into robust DRC/LVS verification code, ensuring consistency between layout, schematic, and manufacturing constraints. The Technician will also support and maintain the verification environment, integrate different EDA tools when required, and develop automation flows to improve efficiency and quality. The position involves close collaboration with internal design teams as well as BU device and process teams in the factory. This is an opportunity to participate in technically challenging projects contributing to reliability improvement, cost reduction, and product quality enhancement.
Key Responsibilities:
•    Develop and maintain DRC and LVS rule decks based on specifications.
•    Translate design manuals and process documentation into production-ready verification code.
•    Support and maintain the physical verification work environment.
•    Integrate and automate EDA tool flows to ensure seamless verification processes.
•    Debug and optimize rule decks for performance, robustness, and scalability.
•    Provide technical support to design teams regarding DRC/LVS issues.
•    Work closely with device, process, and layout engineers to resolve verification discrepancies.
•    Contribute to continuous improvement of verification methodologies and infrastructure.

This Job Is For You If

•    Passionate about technology and new developments  
•    Have innovative thinking and finds creative solutions 
•    Have good collaboration and communication skills

Job Requirements

•    Technician or Practical Engineer in Software, Computer Science, Electrical Engineering, or Electronics- a must
•    B.Sc. in the relevant fields- advantage
•    Relevant experience in physical verification, CAD development, or EDA infrastructure – advantage 
•    Hands-on experience in DRC/LVS code development – advantage 
•    Experience with at least one major physical verification tool (advantage): Siemens Calibre / Cadence PVS / Synopsys ICV
•    Familiarity with rule deck languages and scripting (e.g., SVRF, TVF, Tcl, Python, SKILL) – (advantage)
•    Experience working in UNIX/Linux environments.
•    Understanding layout structures, connectivity extraction, and verification flows.
•    Experience integrating multiple EDA tools and building automation scripts is an advantage.



Israel Perks

Perks And Benefits

Educational resources

Industry leading healthcare on day one.

Savings and Investments

Opportunities to network and connect

Community outreach programs

Employee recognition programs

On-site Dining room, Cafeteria and Gym

Employee transportation

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