Process Engineer, Yield

Date: 21/12/2022

Location: Newport Beach, CA, USA, 92660

Company: Tower Semiconductor Ltd.

About Tower Semiconductor

Looking for a career path in the high tech manufacturing industry? Become part of a team focused on delivering the most exciting semiconductor technology to the world!  If you enjoy working with others in a fast pace environment and are looking for an opportunity to grow your career in the high tech industry then Tower Semiconductor is the place to be!
Tower Semiconductor is a global specialty foundry leader! We specialize in manufacturing analog integrated circuits for more than 300 customers worldwide in growing markets such as automotive, medical, industrial, consumer and aerospace and defense, among others.

Job Description

The Defect Engineer position requires thoroughness while looking for ways to promote quality and improve yield. Responsible for sustaining all released semiconductor-related processing. Major areas of responsibilities include monitoring in-line defectivity levels, resolving in-line yield issues, creating inspection recipes on defect-inspection tools and provide feedback to other Process engineers and management to improve the manufacturing process. Partner with Integration, Process, Equipment and R&D to meet performance, quality and cycle-time requirements. Work with our global team to trouble-shoot, benchmark and improve our processes.

 

This Job Is For You If

 

  • You have strong technical background to develop and sustain 0.35 to 0.13um RFCMOS/SiGe BiCMOS processes in Defectivity Monitoring, and one or more of Photolithography, Etch, Diffusion, Thin-films, CMP/HVAC, Copper Damascene and Wet-cleans - Experience in Copper CMP is a plus.
  • You have experience in sustaining in-line defectivity monitoring tools such as KLA/AMAT defectivity monitoring tools and optical/SEM microscopes.
  • You are an expert in investigating, identifying, verifying, and containing sources of particulate contamination in semiconductor manufacturing.
  • You have experience in analyzing defect-trend data, dispositioning problem wafers/lots, correlating defectivity type/level to product yield, using statistical process control techniques to improve yields, and providing corrective action recommendations to solve defectivity issues.
  • You have the ability to work, and interface with Process Technicians to verify response to daily issues and assist with priority and held lots.
  • You have led major and minor projects involving particulate contamination and fab yield issues by working closely with device, integration, process, and other yield engineers.
  • You have designed and overseen experiments to enhance functional and fab yield thru defect reduction.
  • You have experience in performing analysis of in-line defectivity, E-Test, and Probe data to analyze data from experiments or in-line data to identify and resolve problems.
  • You have strong understanding and experience in direct application of statistical process control
  • You have experience in utilizing advanced analytical tools/software and techniques to solve wafer fabrication problems.
  • Your primary responsibility will be investigating root cause for out-of-control production material, new defect types, and abnormal spatial signatures
  • You must react to baseline shifts and defect excursions with a sense of urgency and partner with Fab Engineering to contain, understand, and resolve any problem that may arise while on-shift
  • There will be opportunities to lead, influence, and support teams associated with defect-density reduction, defect excursions, and high-impact quality events
  • You are required to spend time in the Fab on a daily basis working closely with the on-shift Technicians to resolve inline defect issues and communicate findings to the engineering community through daily interaction with Equipment, Process, and Product engineering counterparts
  • You must identify high-impact defect issues and partner with Fab Engineering to implement corrective actions
  • Presenting inspection data with clear conclusions to upper management is essential
  • You will need to create or update documentation (defect classification guide, disposition specs, etc.) on a regular basis
  • You have experience in researching, analyzing and recommending capital equipment requirements for analytical tool purchases.
  • You are able to work with other teams and QA to deliver results to customer’s requirements.

Job Requirements

  • Minimum requirement is a Bachelor’s degree in Materials Science, Chemistry, Electrical Engineering, Microelectronic Engineering, or Solid-State Physics - Master degree is preferred, New Grads with BSEE encouraged to apply.
  • Minimum 3-5 years yield/process engineering experience.
  • Demonstrated knowledge of principles, theories, concepts, and techniques of process engineering
  • Ability to execute definable portions of a project or lead own small projects
  • Ability to use knowledge to provide solutions to a variety of difficult problems.
  • Strong organizational Skills; demonstrated ability to manage multiple tasks simultaneously and able to react to shifting priorities to meet business needs
  • Demonstrated ability to work well within a global team or environment
  • Six-Sigma certification is preferred
  • Strong knowledge in using Yield Analysis software
  • Strong knowledge in in-line automatic defect inspection tool (application, recipe setup, troubling shooting skill)
  • Sustained ownership of day-to-day operations and mentoring technicians

Compensation

Process Engineer Yield Senior - Senior 2

$97,000 - $146,000

*Tower Semiconductor encourages inquiries from talent at all levels where pay will be based on experience*

 

Perks And Benefits

Industry leading healthcare.

Community outreach programs

Savings and Investments

Educational resources

Opportunities to network and connect

Recruiting incentive program

Employee recognition programs